Direct Answer: Only for Mature-Node Chips; Advanced-Node Self-Sufficiency Remains 5–10 Years Away
China’s semiconductor self-sufficiency rate reached approximately 25–28% in 2025, up from roughly 16% in 2020, but this progress is heavily concentrated in mature-node chips (28nm and above) where Chinese companies like SMIC, HHGrace, and CXMT have made genuine gains. The widely cited “Made in China 2025” target of 70% self-sufficiency by 2025 was never formally adopted as a binding government target — Chinese government policy documents from 2015 to 2020 contained varying formulations ranging from “40% by 2025” to “70% by 2025” depending on the document and the definition of “self-sufficiency.” In reality, China’s self-sufficiency in advanced-node chips (14nm and below, including AI accelerators, high-end mobile SoCs, and HBM memory) remains below 5%, and the gap is widening as US, EU, and Japanese export controls increasingly block the equipment and EDA tools needed to progress beyond 28nm. The realistic outlook is: mature-node self-sufficiency approaching 40–50% by 2028, while advanced-node self-sufficiency lags at 10–15% by 2030 at best.
Defining “Self-Sufficiency”: The Measurement Problem
The question of whether China’s self-sufficiency target is realistic depends entirely on how “self-sufficiency” is defined. There is no single official Chinese government definition, and published estimates vary by a factor of 3–4x depending on the methodology used. Understanding this measurement problem is essential before evaluating any specific target number, because a claim that “China is on track for X% self-sufficiency” may refer to any of four fundamentally different metrics with entirely different policy implications.
| Definition | 2020 Estimate | 2025 Estimate | 2026 Projection | Source |
|---|---|---|---|---|
| Semiconductors consumed in China that are designed AND manufactured by Chinese companies | ~10% | ~16–18% | ~18–20% | BCG / SIA estimates |
| Semiconductors consumed in China that are manufactured in China (regardless of design origin) | ~16% | ~25–28% | ~28–32% | CSET / IC Insights estimates |
| Semiconductors consumed in China that are designed by Chinese companies (regardless of manufacture location) | ~15% | ~22–25% | ~24–27% | McKinsey China Semicon Report |
| Chinese-designed chips in China-manufactured electronics (value-added measure) | ~7% | ~12–14% | ~13–15% | China MIIT industry reports |
The most commonly cited self-sufficiency rate — approximately 25–28% in 2025 — uses the broadest definition (manufactured in China regardless of design origin). This includes chips designed by foreign companies (Qualcomm, NVIDIA, AMD, MediaTek) that are fabricated at SMIC or TSMC China plants. The narrowest measure (designed AND manufactured by Chinese companies) is closer to 16–18% and is the most relevant for assessing China’s strategic vulnerability to semiconductor decoupling. When Chinese government officials reference self-sufficiency targets, they typically use the broad definition, which makes the progress appear larger and the remaining gap appear more achievable than it actually is on the narrow measure that matters for strategic independence.
Mature-Node Capability: Genuine and Substantial Progress
China’s semiconductor self-sufficiency progress is real and significant in the mature-node segment (28nm and above), where export controls have the least impact. The capability gains in this segment represent genuine industrial achievement that foreign companies should factor into their China market assessments. Key indicators of capability growth include:
- SMIC’s 28nm capacity expansion — SMIC (中芯国际, Zhōngxīn Guójì) operates four 300mm fabs capable of 28nm production (Beijing, Shanghai, Shenzhen, and Tianjin). The new Shenzhen fab (Phase 4, online 2025) added approximately 35,000 300mm wafers per month (wpm) of 28nm capacity. SMIC’s total 28nm equivalent capacity reached approximately 150,000–180,000 wpm by mid-2025, up from approximately 60,000 wpm in 2022 — a tripling of capacity in just three years.
- HHGrace’s 55nm–90nm specialization — HHGrace (华虹半导体, Huáhóng Bàndǎotǐ) focuses on 55nm and above with specialization in power management ICs, embedded MCUs, and analog/mixed-signal processes. HHGrace’s Wuxi 12-inch fab (Phase 3) added 80,000 wpm of 55nm capacity in 2025, bringing total capacity to approximately 200,000 wpm (8-inch + 12-inch equivalent). HHGrace has become a leading global foundry for power semiconductor processes including BCD (Bipolar-CMOS-DMOS) technology nodes.
- CXMT DRAM at 19nm — ChangXin Memory Technologies (长鑫存储, Chángxīn Cúnchǔ) achieved volume production of DDR4 and LPDDR4X DRAM at 19nm half-pitch equivalent (approximately the “1Y nm” generation) in 2024–2025. CXMT’s Hefei fab reached approximately 140,000 wpm by early 2025, supplying approximately 8–10% of global DRAM capacity. However, CXMT faces severe equipment constraints for advancing to 17nm or below.
- YMTC NAND at 128-layer — Yangtze Memory Technologies (长江存储, Chángjiāng Cúnchǔ) achieved volume production of 128-layer 3D NAND using its proprietary Xacking (晶栈) architecture. However, YMTC’s 232-layer NAND development has been severely constrained by equipment export controls on high-aspect-ratio deposition and etch tools from US and Japanese suppliers.
- Chinese IC design ecosystem maturity — Over 3,200 IC design companies were registered in China as of 2025 (per CSIA data), with cumulative revenue of approximately RMB 550 billion (approximately USD 76 billion). Chinese-designed chips have achieved significant market share in MCUs (~15–20%), power management ICs (~30–35%), and IoT connectivity SoCs (~40–45%).
Advanced-Node Reality: The Technology Gap Is Widening, Not Narrowing
China’s progress in advanced-node semiconductor manufacturing (14nm and below) is severely constrained by export controls on equipment, EDA software, and critical materials. The gap between China and global leaders (TSMC, Samsung, Intel) has widened since 2022 rather than narrowed:
| Technology Metric | China (SMIC) | Global Leader | Gap (Generations) | Key Constraint |
|---|---|---|---|---|
| Volume production node (logic) | 28nm (strong), 14nm (limited ~10K wpm) | TSMC: 3nm volume, 2nm pilot (2025) | 4–5 generations | No EUV lithography, advanced deposition/etch blocked |
| Best laboratory node | 7nm (FinFET, limited volume, DUV multipatterning) | TSMC: 2nm GAA (pilot 2025) | 3–4 generations | EUV availability; SMIC 7nm uses DUV with lower yield |
| EDA capability | Mature-node flow (28nm+), limited advanced-node | Synopsys/Cadence: full flow to 2nm GAA | 3–4 generations | US EDA export controls block advanced-node tools |
| DRAM volume node | 19nm (1Ynm equivalent) | Samsung, SK Hynix: 12nm (1Bnm), EUV-based | 2–3 generations | No EUV for critical DRAM patterning layers |
| NAND volume node | 128-layer 3D NAND | Samsung, Micron: 300+ layer production | 2–3 generations | Advanced high-AR deposition/etch equipment blocked |
| AI accelerator capability | Huawei Ascend 910B (~7nm equiv, limited volume) | NVIDIA H100/B200 (4nm TSMC) | 2–3 performance generations | TSMC access restricted; own 7nm capacity limited |
The fundamental constraint for Chinese advanced-node manufacturing is not technical knowledge — China has capable engineers and researchers — but equipment access. SMIC’s 7nm FinFET capability reportedly uses DUV (deep ultraviolet) multipatterning (self-aligned quadruple patterning, SAQP) rather than EUV, achieving 7nm feature sizes with much lower yield (estimated ~60–70%) than TSMC’s EUV-based process (>90%). Without access to EUV lithography from ASML (blocked for China under Dutch export controls), scaling beyond 7nm effectively stops. No amount of DUV multipatterning can economically achieve 5nm or 3nm feature sizes.
Impact of Export Controls on Self-Sufficiency Trajectory
The export control regimes have fundamentally altered China’s self-sufficiency trajectory. The BIS October 2022 rules and subsequent expansions created a “sandbox” effect: China can continue to expand mature-node production relatively freely, but advanced-node production is structurally capped by equipment availability:
- Equipment replacement timeline — Chinese semiconductor equipment makers (NAURA, AMEC, ACM Research, Kingsemi) have made progress developing domestic alternatives but are approximately 3–5 generations behind global leaders for critical tools. Equipment self-sufficiency for mature nodes (~40–60% of equipment types) is achievable by 2028–2030; for advanced nodes (<5%), it remains at least a decade away because components (EUV light sources, Zeiss optics) depend on foreign industrial ecosystems China cannot replicate quickly.
- EDA tool self-sufficiency — Chinese EDA companies (Empyrean 华大九天, X-Eda 芯华章, Prima 概伦电子) have built functional tool flows for 28nm and above, particularly for analog/mixed-signal design. Chinese EDA holds approximately 8–10% domestic market share (2025), up from ~5% in 2020. Digital advanced-node flows (synthesis, P&R, timing) for 7nm and below remain dominated by Synopsys and Cadence, and Chinese alternatives are 3–5 years from production-grade capability for advanced nodes.
- Materials and chemicals — Chinese suppliers provide ~25–30% of domestic electronic chemicals, ~40% for specialty gases, and ~30% for CMP slurries and pads. High-purity photoresists for EUV patterning and advanced ALD/CVD precursors remain dependent on Japanese and Korean suppliers. This is the area of highest material self-sufficiency, but dependency persists at the frontier.
- Talent pipeline — China graduates 200,000+ STEM students annually in electronics fields, with an estimated 15,000–20,000 entering IC design and manufacturing roles each year. The bottleneck is not quantity but experience — senior engineers with 10+ years of advanced-node process experience are scarce because domestic advanced-node manufacturing has only existed since ~2020. Many foreign-trained Chinese semiconductor professionals have been recruited back, partially but not fully bridging the experience gap.
Self-Sufficiency Scenarios: 2026–2030 Projections
Based on current trajectories and export control impact, three scenarios are plausible for China’s semiconductor self-sufficiency through 2030:
| Scenario | Key Assumption | 2026 Self-Sufficiency (Broad/Narrow) | 2030 Self-Sufficiency (Broad/Narrow) | Probability |
|---|---|---|---|---|
| Baseline (current trajectory) | Controls maintained at 2025–2026 levels; SMIC limited to DUV multipatterning for 7nm; Chinese equipment makers reach 28nm capability for most tool types by 2028 | 28–32% / 18–20% | 35–40% / 22–28% | 60–70% |
| Optimistic (restrictions ease) | US controls partially relaxed; ASML allowed mid-range DUV to China for non-military fabs; EDA access to 14nm flow restored | 30–35% / 19–22% | 45–55% / 30–35% | 10–15% |
| Pessimistic (controls tighten) | Export controls expanded to mature-node equipment and foundry services; SIA “full decoupling” scenario | 25–28% / 16–18% | 25–30% / 15–18% | 20–25% |
Under the baseline scenario — which aligns with BCG, SIA, CSET, and Rhodium Group analysis — China’s broad self-sufficiency will reach 35–40% by 2030, well below the 70% aspirational target. Narrow self-sufficiency (designed AND manufactured in China) will reach 22–28% by 2030. The gap will continue to be filled by TSMC Taiwan chips, direct imports from US/Korean/European suppliers, and chips assembled in China but designed and fabricated elsewhere.
Strategic Implications for Foreign Semiconductor Companies
The realistic self-sufficiency trajectory has direct implications for foreign companies:
- Mature-node foundry services — Chinese foundries (SMIC, HHGrace) will remain competitive for 28nm+ production, particularly in power management, MCUs, sensors, and automotive ICs. Foreign fabless companies should dual-source with both Chinese and non-Chinese foundries for mature-node products.
- Advanced-node market access — Foreign companies with sub-28nm products will continue to dominate the Chinese market through direct chip sales. The advanced-node market in China is projected at USD 45–55 billion in 2026, with less than 5% supplied by domestic fabrication. This is a structural dependence that will persist for at least 5–7 years.
- Semiconductor equipment and materials — The largest commercial opportunity from China’s self-sufficiency push is mature-node equipment investment. Chinese fabs will require approximately USD 30–50 billion in equipment through 2030 for mature-node expansion. Foreign equipment makers with mature-node-appropriate products under export control thresholds will find strong demand.
- Technology licensing — Remains viable for mature-node process technology and specialty semiconductor processes (power semis, MEMS, analog). Chinese foundries actively seek foreign-licensed technologies for market differentiation in the competitive mature-node space.
- Policy risk monitoring — Watch BIS Federal Register semiconductor China control updates (4–6 month update cycle), China’s National IC Industry Investment Fund (“Big Fund”) Phase III allocation, MIIT IC design enterprise certification lists, and PRC Premier-authored IC industry promotion circulars.
Quick-Reference Assessment Checklist
- Evaluate your product’s node requirement — If ≥28nm, Chinese foundries are viable manufacturing partners. If ≤14nm, plan for TSMC/Samsung for at least 5–7 more years.
- Assess reliance on Chinese-manufactured chips — If dependent on CXMT DRAM or YMTC NAND, maintain 8–12 weeks buffer inventory and identify alternative suppliers (Samsung, SK Hynix, Micron, Kioxia).
- Monitor Chinese EDA tool progress — Evaluate whether Chinese EDA (Empyrean, X-Eda, Prima) can support your mature-node design flow to reduce export control exposure.
- Plan for equipment export scenarios — If you supply semiconductor equipment, develop mature-node-specific tool configurations below control thresholds to maintain China market access.
- Engage with Chinese policy developments — Retain a Shanghai-based semiconductor policy advisory firm to monitor MIIT circulars and local IC incentive programs that may affect your sector.
Where to Go From Here
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