Government Incentives for Semiconductor in China: A Comprehensive FAQ (2025 Update)
China’s semiconductor incentive programs have collectively committed over ¥686 billion (RMB) since 2014 through the National Integrated Circuit Industry Investment Fund (国家集成电路产业投资基金, National Integrated Circuit Industry Investment Fund / Big Fund, guójiā jíchéng diànlù chǎnyè tóuzī jījīn) and parallel local schemes, making it one of the most heavily subsidized technology sectors globally. These incentives target the full value chain — from IC design (集成电路设计企业, Integrated Circuit Design Enterprise, jíchéng diànlù shèjì qǐyè) to advanced manufacturing and packaging — and are accessible to foreign-invested enterprises (外商投资企业, Foreign Invested Enterprise / FIE, wàishāng tóuzī qǐyè) that meet domestic ownership and technology criteria. This FAQ answers the most common questions foreign executives have about eligibility, application processes, and risks.
What Tax Incentives Can Semiconductor Companies Claim in China?
China’s State Council Notice No. 4 (2020) and subsequent circulars define a tiered corporate income tax (CIT) relief system based on process node and company type. The most generous benefit is a full 10-year CIT exemption for manufacturers of integrated circuits with process nodes ≤28nm, provided the company has been operating for at least 15 years and meets the “key IC manufacturer” certification. For nodes between 28nm and 65nm, the well-known 两免三减半 (Two exemptions, three reductions, liǎng miǎn sān jiǎn bàn) policy applies: CIT exemption for the first two profit-making years, followed by a 50% reduction for the next three. Qualified IC design enterprises benefit from an 18% CIT rate (down from the standard 25%), while leading design houses with annual R&D expenses exceeding 5% of revenue can access a 10% CIT rate for the first two years under certain local pilot programs.
Beyond CIT, an R&D expense super-deduction of 100% (increased from 75% in 2023) applies to all qualified semiconductor R&D activities, effectively reducing taxable income by twice the actual R&D spend. The Value-Added Tax (VAT) refund on imported equipment for IC manufacturing has been extended through 2027, and a 5-year carryforward of losses is permitted for newly established IC enterprises. These provisions are codified in the 财税〔2024〕1号 (CaiShui [2024] No. 1) circular, which foreign FIEs should review with local tax bureaus to confirm eligibility, as exclusions exist for companies deemed to have “insufficient technology transfer” to China.
Executives must note that tax incentives are often conditional on meeting annual R&D spending thresholds and technology qualification certificates. The Ministry of Industry and Information Technology (MIIT) maintains a list of “Key IC Enterprises” that auto-qualify for these rates, but the list is updated only once per year, creating a potential lag for new entrants. If your FIE has not yet received MIIT certification, it may still claim a provisional 18% rate by filing a written commitment with the local tax authority, subject to adjustment within 12 months.
How Does the Big Fund Support the Semiconductor Supply Chain?
The 国家集成电路产业投资基金 (National Integrated Circuit Industry Investment Fund, guójiā jíchéng diànlù chǎnyè tóuzī jījīn) — commonly called the Big Fund — operates in three phases. Phase I (2014, ¥138.7B) focused on IC manufacturing (67% of capital) and design (17%). Phase II (2019, ¥204.1B) broadened to equipment and materials, directing approximately 30% to semiconductor equipment makers and 20% to advanced packaging. Phase III (2024, ¥344B) explicitly targets AI chips, advanced memory (HBM), and lithography tools, with ¥100B already allocated to five lead investors including the National Development and Reform Commission (NDRC) and China Development Bank Capital.
Funds are deployed as equity investments, convertible bonds, or joint-venture capital, not grants. A typical Big Fund investment ranges from ¥500M to ¥8B per project, with an average holding period of 5–7 years. For foreign-invested joint ventures, the Big Fund may take a minority stake (typically 15–30%) and expects a seat on the board. The fund uses a “match requirement”: for every ¥1 contributed by the Big Fund, the investee must secure ¥3 from provincial or municipal matching funds, creating a total project multiplier of 4x. This means a ¥2B Big Fund investment can unlock ¥8B in total project capital, making it attractive for large-scale fabs and material plants.
Foreign executives should be aware of the “national champion” preference. While the Big Fund does not formally exclude FIEs, in practice over 92% of Phase I and II recipients are domestic companies. Joint ventures with a Chinese partner holding at least 51% equity have higher approval rates. Projects involving “restricted” technologies under the 2024 外商投资准入负面清单 (Foreign Investment Negative List, wàishāng tóuzī zhǔnrù fùmiàn qīngdān) — such as advanced logic chip design below 16nm — are ineligible for direct Big Fund investment, though they may qualify for local government subsidies instead.
What Local Government Incentives Are Available for Foreign Semiconductor Investors?
More than 50 Chinese cities operate dedicated semiconductor incentive programs, but the most competitive packages come from Shanghai (Zhangjiang Hi-Tech Park), Beijing (Yizhuang Economic Zone), Shenzhen (Pingshan District), and Hefei (Hefei National IC Industrial Base). Shanghai’s “沪集成电路产业发展若干政策” (Several Policies for IC Industry Development in Shanghai, hù jíchéng diànlù chǎnyè fāzhǎn ruògān zhèngcè) offers up to ¥100M in capex subsidies for fab projects exceeding ¥1B total investment, plus a 3-year rent-free period in designated parks. Shenzhen provides a 30% equipment purchase subsidy for IC design companies with revenue below ¥100M, capped at ¥20M per company per year.
Hefei has emerged as a strong challenger, offering a “one-company, one-policy” (一企一策, yī qǐ yī cè) negotiation framework that can include free land use rights for 50 years for fabs above ¥50B investment, plus a 10-year local tax rebate (100% of the local retained portion of CIT for years 1–5, 50% for years 6–10). The table below summarizes the top local incentives for foreign semiconductor investors:
| City / Zone | Max Capex Subsidy | R&D Grant Rate | Rent Subsidy | FIE Eligibility |
|---|---|---|---|---|
| Shanghai Zhangjiang | ¥100M (10% of capex) | 20% of qualified R&D, cap ¥30M/yr | 3 years free | Yes, with ≥25% local partner |
| Beijing Yizhuang | ¥80M (8% of capex) | 15% of R&D, cap ¥20M/yr | 2 years 50% subsidy | Yes, no local partner required |
| Shenzhen Pingshan | ¥60M (15% of equipment) | 25% of R&D, cap ¥15M/yr | 2 years free | Yes, for ≤16nm design only |
| Hefei IC Base | Negotiable (≥¥1B) | 30% of R&D, cap ¥50M/yr | 5 years free | Yes, with ≥51% local JV partner |
These local incentives are often stackable with central government tax breaks, but executives must verify “non-duplication” clauses. Some zones require companies to choose between the local rent subsidy and the central equipment import VAT refund — you cannot take both. Always request a written “package letter” (一揽子协议, yī lǎnzi xiéyì) from the local investment promotion bureau that explicitly lists which incentives stack and which are exclusive.
Decision Framework: Which Incentive Path Fits Your Semiconductor Project?
If your company focuses on advanced logic chip manufacturing with process nodes ≤28nm, choose the central government 10-year CIT exemption combined with a Big Fund Phase III equity investment for a large-scale fab project. If your company is an IC design house with annual R&D spending above 5% of revenue, the 18% CIT rate plus the 100% R&D super-deduction provides a faster, less bureaucratic path — consider Shenzhen or Shanghai for additional local R&D grants. If your project is in semiconductor equipment or materials with no advanced node restriction, target Hefei or Beijing Yizhuang, where local land subsidies and free rent for 5 years significantly reduce upfront cap-ex exposure. If your company is a foreign-invested joint venture with <51% foreign equity, all central and local incentives remain accessible; if foreign equity exceeds 51%, restrict yourself to local programs in Beijing or Shenzhen that do not require a local majority partner.
Three Common Pitfalls When Applying for Semiconductor Incentives
Next Steps
- Audit your process node and FIE structure. Download our Semiconductor Incentive Eligibility Checklist to determine which tax tiers and local programs you qualify for based on your current legal entity and technology roadmap.
- Review the MIIT certification timeline. Read our guide on MIIT Key IC Enterprise Certification for a step-by-step application process, including document templates and typical 6-month review cycle.
- Compare local incentive packages. Use our China Semiconductor City Incentive Comparison Tool to model net financial impact across Shanghai, Beijing, Shenzhen, and Hefei based on your project size and foreign equity share.
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