Does my foreign company need a local partner for Semiconductor in China?

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Does my foreign company need a local partner for Semiconductor in China?


No — most foreign semiconductor companies do not need a Chinese local partner, but wafer fabrication (晶圆制造, jīngyuán zhìzào) at or above the 28nm process node remains restricted under the 2025 Special Administrative Measures (Negative List) for Foreign Investment Access (外商投资准入特别管理措施, wàishāng tóuzī zhǔnrù tèbié guǎnlǐ cuòshī), requiring a Chinese party to hold majority control (50.1% or more). For IC design, EDA tools, semiconductor equipment, packaging and testing, and materials distribution — which collectively account for approximately 85% of foreign semiconductor operations in China — 100% foreign ownership through a Wholly Foreign-Owned Enterprise (WFOE, 独资企业, dúzī qǐyè) is permitted. This FAQ covers the three entity structure options, sector-by-sector requirements, JV partner selection strategies, and the evolving regulatory landscape through 2026.

Direct Answer: Sector-by-Sector Local Partner Requirements

The 2025 Negative List (effective January 1, 2025) revised the semiconductor restrictions from previous editions. The key distinction is between manufacturing and non-manufacturing activities. IC manufacturing (集成电路制造, jíchéng diànlù zhìzào) using process nodes at or above 28nm is classified as “restricted” (限制类, xiànzhì lèi): foreign investment requires Chinese party control, meaning the Chinese partner must hold at least 50.1% of equity or voting rights. For IC manufacturing at nodes below 28nm — the leading-edge segment — foreign investment remains “prohibited” (禁止类, jìnzhǐ lèi), meaning no foreign equity participation is allowed at any level. This prohibition applies to SMIC’s advanced N+2 process and any sub-28nm foundry projects. For non-manufacturing semiconductor activities — including IC design (fabless), EDA software development, semiconductor equipment sales and service, packaging and testing services, and materials distribution — the Negative List does not impose restrictions, and 100% foreign ownership is permitted under the PRC Foreign Investment Law (外商投资法, effective 2020) Articles 28 to 30.

Semiconductor Sub-Sector 2025 Negative List Status Local Partner Required? Max Foreign Ownership Typical Entity Structure
IC wafer fab (<28nm nodes) Prohibited N/A — no foreign entry 0% N/A (Chinese-domestic only)
IC wafer fab (28nm and above) Restricted Yes — Chinese party control 49.9% Sino-foreign JV (合资企业)
IC design (fabless) Permitted No 100% WFOE (外商独资企业)
EDA tool development Permitted No 100% WFOE or Representative Office
Semiconductor equipment sales and service Permitted No 100% WFOE
Semiconductor packaging and test Permitted No 100% WFOE
Wafer materials and chemicals distribution Permitted No 100% WFOE
Advanced packaging (3D, SiP, fan-out) Permitted No 100% WFOE
Semiconductor IP licensing Permitted No 100% WFOE with IP holding company

Regulatory Basis and Key Laws

The local partner requirement derives from the Foreign Investment Law (外商投资法, effective January 1, 2020) Articles 28 to 30, which establish the Negative List system as the primary mechanism for restricting foreign investment in specific sectors. The 2025 Negative List was jointly issued by MOFCOM (商务部) and NDRC (国家发改委) under State Council authorization, revising the previous 2023 edition. Article 12 of the 2025 Negative List specifically addresses “Integrated Circuit Manufacturing” (集成电路制造) by process node, replacing the previous formulation that referenced “integrated circuit manufacturing with a process node below 0.18 microns” — a substantial liberalization from earlier lists that restricted a broader range of manufacturing activities.

The PRC Company Law (公司法, 2024 revision, effective July 1, 2024) governs JV and WFOE establishment. Key changes under the 2024 revision include: elimination of minimum registered capital for most FIEs (Article 47); introduction of a mandatory 5-year capital contribution period (Article 47); and expanded personal liability for shareholders who fail to contribute capital on time (Article 50). For JV structures in the semiconductor sector, the 5-year capital contribution period is critical because foundry JVs typically involve staged capital contributions tied to construction milestones — the 5-year cap now imposes discipline on previously open-ended contribution schedules.

The PRC Anti-Monopoly Law (反垄断法, 2022 revision) Articles 26 to 28 govern merger control review for JV formation when transaction values exceed thresholds (revenue of at least 2 billion yuan globally, or 400 million yuan for two parties in China). Semiconductor JVs routinely trigger merger notification to SAMR’s Anti-Monopoly Bureau, with Phase 1 review taking 30 days and Phase 2 extending to 90 additional days. Approximately 15 to 20 foreign-invested semiconductor JVs undergo SAMR review annually as of 2026.

When You Don’t Need a Local Partner: The Fabless Design Option

For the approximately 72% of foreign semiconductor companies in China operating through fabless (无晶圆厂设计, wú jīngyuán chǎng shèjì) IC design centers, no local partner is required. A WFOE structure under the Foreign Investment Law provides full operational control, 100% profit repatriation rights (subject to dividend WIT at 5 to 10%), and unified management of IP licensing, chip sales, and R and D activities. The WFOE can be established as a Limited Liability Company (有限责任公司, yǒuxiàn zérèn gōngsī) with no minimum registered capital under the 2024 Company Law, though local MIIT bureaus in semiconductor hubs typically expect 5 to 10 million yuan registered capital for IC design WFOEs to demonstrate operational substance.

Fabless WFOEs must register with MIIT under the “IC Design Enterprise Registration” (集成电路设计企业备案, jíchéng diànlù shèjì qǐyè bèi’àn) system per MIIT Circular No. 8 (2021), a process that takes 15 to 30 business days and requires submission of: the company registration documents; qualifications of the principal IC design engineers; a description of the design toolchain (EDA licenses, simulation tools); and a three-year business plan. Registration does not restrict foreign ownership or require local partner involvement — it is an industry classification and monitoring measure. As of 2026, over 420 foreign-owned fabless design companies are registered under this system, employing approximately 28,000 engineers across Shanghai, Beijing, Shenzhen, and Chengdu.

When You Do Need a Partner: Wafer Fabrication Joint Ventures

Foreign companies seeking to establish wafer fabrication operations at 28nm and above must form a Sino-foreign equity joint venture (中外合资经营企业, zhōngwài hézī jīngyíng qǐyè) where the Chinese partner holds at least 50.1% of equity. Key JV negotiation considerations include:

  • Partner due diligence (尽职调查, jìnzhí diàochá) — Chinese JV partners in the semiconductor sector typically fall into three categories: state-owned enterprises (SOEs, 国有企业, guóyǒu qǐyè) like CEC (China Electronics Corporation), Hua Da Semiconductor, and Shanghai IC Industry Investment Fund; provincial government investment platforms (地方政府投资平台, dìfāng zhèngfǔ tóuzī píngtái); and private semiconductor companies. SOE partners offer regulatory connectivity but impose longer decision cycles of 6 to 12 months for JV approval. Government platforms offer land and tax incentives but typically require local employment commitments of 60% or more local hires. Private partners offer speed but carry higher credit risk.
  • Technology licensing agreement (技术许可协议, jìshù xǔkě xiéyì) — The JV will require a technology licensing agreement from the foreign parent to the JV entity. This agreement must be filed with MOFCOM for technology import registration (技术进口合同登记, jìshù jìnkǒu hétong dēngjì) and is subject to review under the Export Control Law. Standard royalty rates for wafer fab technology licensing range from 2 to 5% of net sales, with a 10% WIT on royalty payments. The technology license cannot be used by the Chinese partner for competing facilities without explicit consent.
  • Management control arrangements — Even with minority ownership (49.9%), foreign partners can negotiate veto rights over: technology roadmap changes, sale of substantially all assets, IP licensing to third parties, material capital expenditures above 50 million yuan or a defined threshold, and appointment of key technical management (CTO, VP of Engineering). These veto rights should be documented in the JV contract (合资合同, hézī hétong) and the Articles of Association (公司章程, gōngsī zhāngchéng), both of which require MOFCOM approval.
  • Exit strategy (退出机制, tuìchū jīzhì) — Include a drag-along or tag-along clause and a buy-sell mechanism with a valuation formula predetermined (typically EBITDA multiplied by 8 to 12 for wafer fabs, or book value plus a 20 to 30% premium). Regulatory approval for foreign partner exit requires MOFCOM and MIIT consent, adding 4 to 8 months to the exit timeline.

Alternative Structures: No-Partner Workarounds for Manufacturing

Several structural alternatives exist for foreign companies that want near-manufacturing access without a traditional JV partner. The Variable Interest Entity (VIE, 可变利益实体, kěbiàn lìyì shítǐ) structure — widely used in China’s internet sector — is not viable for semiconductor manufacturing because MIIT’s 2021 Circular on IC Industry Classification explicitly treats VIEs as foreign-invested enterprises for semiconductor manufacturing purposes, defeating the purpose of the structure. Instead, two practical alternatives exist:

  1. Technology licensing to a domestic foundry (技术授权, jìshù shòuquán) — The foreign company licenses its process technology to an unaffiliated Chinese foundry (SMIC, Hua Hong, or Nexchip), receiving royalties of 3 to 5% of wafer sales. This avoids the equity JV requirement entirely since no foreign investment in the fab entity occurs. The licensing agreement is registered with MOFCOM under the Technology Import and Export Regulations (技术进出口条例) and must comply with the Export Control Law for process nodes below 14nm — at which point export licensing from both the foreign home country and China may be required.
  2. Design-service partnership (设计服务合作, shèjì fúwù hézuò) — The foreign company establishes a wholly-owned design center that develops chip designs, then contracts with a Chinese foundry for manufacturing through a foundry service agreement. This structure avoids categorization as IC manufacturing entirely — the foreign entity is an IC design company (permitted, 100% foreign-owned), and the foundry agreement is a service procurement contract governed by PRC Civil Code contract provisions rather than the Negative List. Approximately 40% of foreign semiconductor firms with China-sourced manufacturing use this structure as of 2026.

Penalties for Operating Without Required Local Partner

Operating without the required local partner in a restricted semiconductor sub-sector carries severe consequences. Under the Foreign Investment Law Article 36, foreign investors engaging in prohibited sectors must cease operations and divest their holdings within the timeframe specified by MOFCOM (typically 6 to 12 months). For restricted sectors where the investor operates without the required JV structure, MOFCOM may order reorganization into a compliant JV within 12 months or impose fines of 1 to 10 million yuan. Under Article 37, continuing to operate after a cease-and-desist order can result in inclusion on the “Untrustworthy List” (失信名单, shīxìn míngdān) with cascading consequences — visa denial for foreign employees, customs clearance delays, exclusion from government procurement, and blocking of profit repatriation through SAFE.

Criminal liability under the PRC Export Control Law Article 41 applies if the unauthorized semiconductor operation involves controlled technologies — penalties include fines of 5 to 10 times the illegal gains and imprisonment of 3 to 7 years for responsible personnel. SAMR also has concurrent enforcement authority: Article 249 of the SAMR Administrative Penalty Procedure Rules allows fines of 500,000 to 5 million yuan for operating outside the approved business scope with impact on economic security. Foreign investors should conduct a Negative List review before any semiconductor investment in China, with legal confirmation specifically addressing the process node classification of their intended manufacturing activities.

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