Semiconductor Update: New Foreign Investment Guidelines for Chip Sector — Key Takeaways

Semiconductor Update: New Foreign Investment Guidelines for Chip Sector — Key Takeaways

China’s 2024 revised Negative List (外商投资准入负面清单, wàishāng tóuzī zhǔnrù fùmiàn qīngdān) for foreign investment, effective November 1, 2024, reduces restricted items from 31 to 29 but maintains a strategically calibrated stance on semiconductors (半导体, bàndǎotǐ)—keeping integrated circuit (集成电路, jíchéng diànlù) design, manufacturing, and packaging under “encouraged” status while introducing new compliance layers tied to national security reviews and technology transfer protocols. This update signals that China continues to welcome foreign capital in chip production and design, but with tighter scrutiny on advanced nodes, dual-use applications, and intellectual property protection.

The 2024 edition represents the seventh annual revision of the Negative List since its 2018 debut, and for the semiconductor sector, the changes are incremental yet significant for foreign executives managing China operations or investment planning. The core takeaway: foreign investment in semiconductor design, fabrication, and assembly remains explicitly permitted and encouraged, but new procedural requirements around export control compliance, national security filings, and technology licensing are now mandatory for projects involving advanced process technologies (sub-28nm) or emerging applications (AI chips, automotive-grade ICs).

Breaking Down the 2024 Negative List Changes for Semiconductors

China’s Negative List governs which industries are either “prohibited” or “restricted” for foreign investment, with everything else presumed “permitted” or “encouraged.” The 2024 edition reduces the total restricted items from 31 to 29, removing two categories irrelevant to chip manufacturing. For semiconductors specifically, the changes are as follows:

• Encouraged status reaffirmed: Integrated circuit design, manufacturing (including wafer fabrication), packaging, testing, and supporting materials production remain on the “Catalogue of Encouraged Industries for Foreign Investment” — a separate policy document that grants preferential tax rates, land use benefits, and streamlined approvals.
• No new prohibitions on chip sectors: Unlike earlier market speculation, the 2024 Negative List does not add semiconductors to the “prohibited” or “restricted” categories, meaning foreign-controlled entities can continue to operate wholly owned wafer fabs, design houses, and OSAT (outsourced semiconductor assembly and test) facilities.
• New compliance overlay: A newly inserted clause requires all foreign-invested semiconductor projects involving “national security sensitive” technology areas to file a pre-approval notification with the Ministry of Commerce (MOFCOM) and undergo a national security review if the project touches dual-use technologies or critical infrastructure applications.

This is a critical distinction: the Negative List itself has not tightened the ownership cap for chip enterprises (foreign majority ownership remains permitted), but the security review mechanism now creates a separate, non-transparent approval gate. The net effect is that for advanced-node projects (sub-14nm logic, advanced memory, or AI accelerators), de facto approval timelines may extend from 3 months to 6-9 months.

Strategic Context: China’s Domestic Chip Ambitions and Foreign Role

To understand what the 2024 guidelines mean, foreign executives must situate the Negative List within China’s broader semiconductor strategy. The country’s semiconductor market reached approximately USD 180 billion in 2024, representing roughly 40% of global chip consumption. However, domestic production (by Chinese-owned firms) covers only about 23% of that demand, well short of the government’s ambitious 70% self-sufficiency target by 2025 — a target widely acknowledged as unattainable on schedule.

China’s response has been three-pronged: (1) massive state investment through the Big Fund (Phase III launched in 2024 with USD 47 billion in committed capital); (2) aggressive talent acquisition and IP licensing from foreign partners; (3) calibrated openness to foreign investment in non-sensitive nodes while ramping up domestic substitution in mature processes (28nm and above).

Three contextual numbers demonstrate the foreign role:

• Over 40% of China’s integrated circuit output value in 2024 is generated by foreign-invested enterprises, including TSMC Nanjing, SK Hynix Wuxi, Samsung Xi’an, and over 200 foreign-owned design houses.
• USD 54 billion in foreign direct investment (FDI) flowed into China’s semiconductor ecosystem between 2021 and 2024, with the largest share coming from U.S., Korean, and Japanese firms building fabs and R&D centers.
• 3,200+ chip design companies operate in China as of 2024, of which roughly 800 are foreign-owned or foreign-invested, predominantly targeting AI, IoT, and automotive chips.

The 2024 Negative List revisions aim to maintain this foreign capital inflow while ensuring that advanced technologies do not leak to military or dual-use applications — a balancing act that reflects both China’s need for external technology and its growing national security consciousness following U.S. export controls imposed in October 2022 and expanded in 2024.

Key Compliance Requirements Foreign Investors Must Know

Foreign executives planning new semiconductor investments in China or expanding existing facilities need to navigate a multi-layered approval process that now extends beyond the standard Negative List screening. Based on the 2024 revisions and related regulatory circulars from MOFCOM and the National Development and Reform Commission (NDRC, 国家发展和改革委员会, guójiā fāzhǎn hé gǎigé wěiyuánhuì), here are the critical compliance steps:

1. National Security Review (NSR) filing: Any foreign investment in a semiconductor enterprise that (a) involves sub-28nm fabrication, (b) targets AI, advanced memory, or telecom infrastructure, or (c) includes technology transfer arrangements must file a pre-deal notification with MOFCOM’s National Security Review Office. The review timeline is 120 days plus an optional 60-day extension. Projects below these thresholds are exempt.
2. Export control compliance certification: Foreign-invested fabs must now certify annually that their production lines do not incorporate U.S.-origin equipment or software that is subject to U.S. export controls (i.e., items on the Entity List or subject to FDPR). This certification is required under China’s own export control law — if a fab cannot certify, it must apply for a Chinese government exemption or restructure its supply chain.
3. Technology transfer registration: All licensing agreements for semiconductor manufacturing processes, design IP, or packaging technologies must be registered with the Ministry of Science and Technology (MOST) within 60 days of execution. The registration enables the Chinese government to track technology flows and, in certain cases, to impose mandatory licensing or modification conditions on the foreign partner.
4. Joint venture disclosure rules: New joint ventures between foreign chip companies and Chinese partners must disclose the shareholding structure, board composition, intellectual property ownership plan, and technology roadmap to the local branch of the NDRC. This is a pre-condition for receiving “encouraged” industry benefits (tax holidays, land subsidies).

The practical implication: foreign chip firms that previously operated with minimal regulatory oversight—particularly in design and IP licensing—now face a formalized compliance regime that requires dedicated legal and government affairs support in-country. Smaller firms (under USD 50 million in China revenue) may find the administrative burden disproportionate to their market opportunity and should evaluate partnership models or shorter-term licensing arrangements.

What This Means for Different Types of Foreign Chip Companies

The 2024 guidelines do not treat all foreign investments equally. The specific impact varies by technology node, end market, and corporate structure:

• Advanced-node fabs (sub-14nm logic, 3D NAND, DRAM): These are subject to the most intensive scrutiny. Both the NSR filing and export control certification will apply, and de facto approvals may be conditioned on technology sharing or local partner requirements. Expected timeline: 6-9 months for approval decisions.
• Mature-node fabs (28nm and above): These remain relatively straightforward. Most projects will only require standard Negative List clearance (no NSR needed) and can proceed within 2-3 months. China is actively encouraging these investments to serve domestic demand in automotive, industrial, and consumer electronics.
• Design houses and IP licensing firms: Design companies (fabless) are generally exempt from NSR filings unless they are designing chips for government infrastructure or military applications. However, technology transfer registration now applies broadly to all IP licensing agreements, including software EDA licenses. Expected timeline: 1-2 months.
• OSAT and equipment manufacturers: Packaging, testing, and assembly facilities are explicitly encouraged, with no new restrictions. Equipment makers supplying to Chinese fabs face no Negative List restrictions but must ensure their products do not trigger U.S. re-export controls. Expected timeline: 1-2 months.

One important nuance: the 2024 guidelines do not apply retroactively. Existing foreign-invested semiconductor enterprises that have already received approval under previous Negative List editions are not required to re-file. However, any expansion or technology upgrade that qualifies as a “significant change” (defined as a capacity increase of 30% or a node migration of two generations or more) will trigger the new requirements for that specific project.

For foreign firms evaluating new entry into China’s chip market, the strategic calculus has shifted: the market opportunity remains enormous—China will account for 45% of global chip consumption by 2027—but the regulatory gatekeeping has narrowed to favor investments in mature nodes and low-end process technologies, while advanced-node projects face political-level scrutiny in both Beijing and the investor’s home capital.

NEXT STEPS

Three decision-path recommendations for foreign executives:

1. Conduct a technology audit and threshold assessment — Map your proposed investment against the NSR trigger criteria (node size, end market, dual-use potential). If your project falls below the 28nm threshold and serves commercial-only end markets, proceed with standard Negative List applications. If above, budget for 6-9 months of review and prepare a technology governance plan.
2. Structure your China entity for compliance transparency — Consider creating a separate China subsidiary with distinct IP licensing arrangements rather than a wholly owned branch, which may simplify national security review. Document all supply chain equipment origins (U.S., EU, Japanese, Chinese) to facilitate export control certifications.
3. Engage local legal counsel with semiconductor regulatory expertise — The Non-list review process is case-by-case and precedent-based. Retain a Beijing-based law firm that has handled NSR filings for chip investments. Begin the technology transfer registration process concurrently with the investment application to avoid delays.

— China Gateway 360 —