Can I Operate Semiconductor as a Wholly Foreign-Owned Entity?

Can I Operate Semiconductor as a Wholly Foreign-Owned Entity?

Short answer: Yes, but with critical subsector-specific conditions. Approximately 70 % of semiconductor subsectors in China are fully open to Wholly Foreign-Owned Enterprise (WFOE, 外商独资企业, wàishāng dúzī qǐyè) formation under the 2024 edition of the Foreign Investment Negative List (fùmiàn qīngdān, 负面清单). IC design, semiconductor equipment, EDA tools, and materials are generally permitted. The key exception involves advanced-node chip fabrication — defined as processes below 28 nanometers — where Chinese-majority ownership or a qualified Chinese partner is required.

This FAQ provides a detailed, regulation-by-regulation breakdown of where a WFOE works, where it does not, and what alternative structures exist for foreign investors targeting China’s semiconductor market as of 2026.

Regulatory Framework: How China Controls Foreign Investment in Semiconductors

China’s foreign investment regime operates under a “National Treatment plus Negative List” management system (zhǔn rù qián guó mín dài yù jiā fù miàn qīng dān, 准入前国民待遇加负面清单). This principle, codified in the Foreign Investment Law of the People’s Republic of China (中华人民共和国外商投资法), effective January 1, 2020, guarantees that foreign investors receive treatment no less favorable than domestic investors — except in industries specifically listed on the Negative List.

The operative document is the Special Administrative Measures (Negative List) for Foreign Investment Access (外商投资准入特别管理措施, 负面清单), most recently revised in 2024. The 2024 edition reduced the total number of restricted measures from 31 to 29, continuing a multi-year trend of liberalization. Semiconductor manufacturing, design, and related services are not categorically prohibited — but certain sub-entries carry “中方控股” (zhōngfāng kònggǔ, Chinese-controlled) or “中方相对控股” requirements.

Subsector-by-Subsector Analysis

The semiconductor value chain spans design, fabrication, assembly and test, equipment, materials, and electronic design automation (EDA). Each subsector is treated differently under the Negative List. The table below summarizes WFOE feasibility as of 2026.

Detailed Subsector Commentary

IC Design (集成电路设计, jíchéng diànlù shèjì). This is the most accessible entry point for foreign investors. Global firms such as AMD, Qualcomm, NVIDIA, and Imagination Technologies have operated China-based WFOEs in design services for decades. No Chinese partner is required. However, design outputs destined for advanced-node manufacturing (below 28nm) at Chinese foundries may trigger export-control reviews if the design incorporates certain U.S.-origin EDA tools, under the Bureau of Industry and Security (BIS) Export Administration Regulations (EAR) — these are U.S. controls, not Chinese WFOE restrictions.

IC Manufacturing — Legacy Nodes (28nm and above). Wafer fabs operating at 28nm, 40nm, 65nm, 90nm, 0.13 µm, 0.18 µm, and larger nodes are fully open to foreign ownership. This includes the production of power-management ICs, microcontrollers (MCUs), analog chips, and display drivers. Several foreign-invested fabs in China — such as those by STMicroelectronics (with Huali Microelectronics) and Texas Instruments — operate under majority-foreign ownership structures at legacy nodes.

IC Manufacturing — Advanced Nodes (below 28nm). Fabrication of logic, memory, or integrated chips at process nodes below 28nm (e.g., 16nm/14nm, 7nm, 5nm, 3nm) carries a Chinese-majority-ownership requirement. The Negative List states: “The construction and operation of integrated circuit manufacturing projects with process nodes below 28nm shall be controlled by a Chinese party” (中方控股). In practice, this means foreign investors may hold a minority stake (up to 49%) but cannot control the board or strategic decisions without a Chinese partner holding a majority. The approval pathway involves a joint review by the NDRC and MOFCOM, and the project may also need to pass a national security review under the Foreign Investment Security Review mechanism (外商投资安全审查).

Semiconductor Equipment. Wafer processing equipment (etch, deposition, lithography, metrology), test and handling equipment, and wafer-level packaging tools are all outside the Negative List’s restricted categories. A foreign equipment manufacturer — such as Applied Materials, ASML (with its inspection business), Lam Research, or Tokyo Electron — can establish a WFOE in China for sales, service, support, and even local manufacturing. The 2024 Negative List did not introduce any new restrictions in this subsector.

Semiconductor Materials. Polysilicon, silicon wafers (CZ and FZ), photoresists, CMP slurries, electronic specialty gases, sputtering targets, and lead frames are all open to WFOE investment. Global material suppliers including Shin-Etsu Handotai, SUMCO, BASF, and Merck KGaA operate wholly owned subsidiaries in China for both manufacturing and distribution of semiconductor-grade materials.

EDA Tools. Electronic Design Automation software — a market dominated by Synopsys, Cadence, and Siemens EDA — is unrestricted for WFOE formation in China. However, under U.S. export controls, certain advanced EDA tools (e.g., those used for GAAFET or 3nm+ design) require a U.S. export license for sale or technology transfer to China-based entities. This is a cross-border trade control, not a restriction on the corporate form itself.

Capital and Registration Requirements

China eliminated the minimum registered capital requirement for most industries, including semiconductors, in the 2014 Company Law amendments. However, practical considerations apply.

1. IC Design WFOE: Registered capital of RMB 500,000–RMB 2 million (approx. US$70,000–$280,000) is typical for a design-service entity. No mandatory minimum.
2. Equipment Service / Sales WFOE: RMB 1 million–RMB 3 million is common. The local Commerce Bureau (商务局) may scrutinize the capital adequacy relative to the scope of proposed operations.
3. Manufacturing WFOE (Fab): Large-scale fabrication requires substantial paid-in capital — typically US$50 million to US$500 million+ — negotiated with local development zones (经开区, jīngjì kāifā qū) that offer land, utility, and tax incentives. The minimum registered capital is contractually determined rather than statutorily mandated.
4. Advanced-Node Fab (JV): If a Chinese partner must hold the majority, the foreign investor’s capital contribution is limited to ≤49% of total registered capital. The JV’s articles of association must grant the Chinese party control over key strategic decisions, board appointment, and technology transfer governance.

The approval process for a standard semiconductor WFOE follows the general foreign investment filing procedure under the Foreign Investment Law:

• Filing (备案, bèi’àn): For unrestricted subsectors (IC design, equipment, materials, EDA), the investor files online through the MOFCOM Foreign Investment Comprehensive Management System. No prior approval is needed; the filing confirmation is issued within three working days.
• Approval (核准, hézhǔn): For restricted subsectors (advanced-node fabs), the investor must submit a project application to the NDRC and a company-establishment application to MOFCOM. Approval timelines range from 30 to 90 working days. National security review may add 30 to 120 working days.
• Special Restrictions: If the technology involves encryption, certain telecom equipment, or dual-use semiconductor items listed in the China Export Control Law (出口管制法, effective December 2020), additional export-control licensing applies separately from the WFOE registration process.

Alternative Structures: When a WFOE Won’t Work

For foreign investors targeting advanced-node fabrication (below 28nm), a Wholly Foreign-Owned Entity is not permissible. The following alternative structures are available.

Joint Venture (JV) with Chinese Majority

A Sino-foreign equity joint venture (中外合资经营企业, zhōngwài hézī jīngyíng qǐyè) is the statutory requirement for advanced-node fabs. The Chinese partner — typically a state-owned enterprise (SOE) such as SMIC, Hua Hong Semiconductor, or a provincial-level SOE — must hold at least 51% of equity. The foreign investor contributes leading-edge process technology, advanced equipment procurement channels, and capital. Technology licensing and IP protection should be addressed in a separate Technology License Agreement (技术许可协议, jìshù xǔkě xiéyì) governed by Chinese law with arbitration provisions (CIETAC or SIAC).

Cooperative Joint Venture (CJV)

China’s Cooperative Joint Venture (中外合作经营企业, zhōngwài hézuò jīngyíng qǐyè) permits more flexible profit-sharing and management structures that do not strictly follow equity percentages. While less common since the 2020 Company Law harmonization, the CJV structure may be used where the foreign investor wishes to retain operational control while capping the Chinese partner’s profit share. Note that some local MOFCOM bureaus now discourage CJVs for manufacturing projects and prefer equity JVs.

Variable Interest Entity (VIE) — Caution

The VIE (可变利益实体, kě biàn lìyì shítǐ) structure, historically used to circumvent foreign ownership restrictions in Chinese telecom and internet sectors, carries significant legal risk for semiconductor projects. Chinese courts have increasingly scrutinized VIE arrangements for violating the Negative List. In 2023, the NDRC explicitly stated that foreign investors cannot use VIE structures to bypass Negative List restrictions (NDRC Public Notice No. 7/2023). Semiconductor projects should not rely on the VIE model.

Wholly Domestic Entity with Technology Licensing

Some foreign companies choose to license their semiconductor IP or process technology to an unaffiliated Chinese entity without taking an equity position. While this avoids ownership restrictions, it provides limited control over manufacturing quality, IP protection, and profit participation. It is best suited for mature-node technologies where licensing royalties (typically 2%–5% of net sales) are the primary revenue objective.

Recent Policy Changes (2024–2026)

The semiconductor regulatory landscape has shifted rapidly since 2022. Key developments include:

• 2024 Negative List Reduction: The 2024 edition removed restrictions on certain value-added telecom services (including some cloud-related services used by semiconductor designers), but left the 28nm advanced-node restriction unchanged. The semiconductor-related provisions identical to the 2021 edition.
• Foreign Investment Security Review Enhancement (2024): The revised Foreign Investment Security Review Measures (外商投资安全审查办法) expanded review scope to include “critical semiconductor supply chain technologies.” Any foreign investment that could affect China’s semiconductor supply chain security — including acquisitions, greenfield manufacturing projects, and certain JVs — may now be subject to mandatory review. The review period can extend up to 120 working days.
• Export Control Law Enforcement (2025–2026): China’s Export Control List was updated in early 2025 to include gallium (Ga), germanium (Ge), antimony (Sb), and certain superhard materials used in semiconductor manufacturing. While these controls primarily affect the export of materials from China, foreign-invested WFOEs engaged in materials production must now apply for export licenses for these controlled items.
• Tax Incentive Extension (2025): The preferential corporate income tax rate of 10% (reduced from the standard 25%) for “key IC manufacturing enterprises” was extended through 2030 under Caishui [2024] No. 18. This benefit applies to WFOEs and JVs alike, provided the entity meets qualifying criteria related to process node (28nm or below), operational revenue, and R&D intensity.
• Semiconductor Industry Great Fund Phase III (2025): The China Integrated Circuit Industry Investment Fund (大基金, dà jījīn) Phase III was launched in mid-2025 with a capital pool of approximately RMB 344 billion (≈US$48 billion). Foreign-invested JVs with Chinese majority partners are eligible for co-investment, but wholly foreign-owned entities are generally excluded from direct fund participation.
• Local Government Incentives: Several provincial governments — notably Shanghai (Zhangjiang Hi-Tech Park), Beijing (Beijing Economic-Technological Development Area, 亦庄), and Shenzhen (Pingshan District) — have issued standalone semiconductor investment catalogs for 2025–2027 that explicitly welcome foreign-invested WFOEs in IC design, EDA, and equipment. These catalogs supersede the national Negative List for permitted subsectors and offer additional incentives such as rent subsidies, talent housing, and R&D grants of up to RMB 30 million per project.

Common Misconceptions About Semiconductor WFOEs

Myth 1: “All semiconductor investments in China require a Chinese partner.” False. Only advanced-node (<28nm) chip fabrication carries this requirement. IC design, equipment, materials, EDA, assembly, testing, and legacy-node manufacturing are all open to 100% foreign ownership.

Myth 2: “The Negative List bans foreign investment in all IC manufacturing.” False. The Negative List restricts advanced-node IC manufacturing. The vast majority of global semiconductor output (approximately 75% by revenue) is at 28nm or above — power management, analog, automotive MCUs, display drivers, and IoT SoCs. These are all permitted for WFOE manufacturing in China.

Myth 3: “A WFOE automatically qualifies for Chinese government semiconductor subsidies.” False. Many local subsidy programs require that the investor’s home country has a bilateral investment treaty (BIT) with China or that the entity registers as a “foreign-invested enterprise” without Chinese partner — and even then, access to national programs like the “Big Fund” is typically limited to domestically controlled enterprises.

Myth 4: “You cannot repatriate profits from a semiconductor WFOE.” False. Profits from a legitimate, tax-compliant WFOE may be repatriated after statutory reserve allocations (10% to statutory surplus reserve until 50% of registered capital) and payment of corporate income tax. The State Administration of Foreign Exchange (SAFE) oversees dividend repatriation, which generally proceeds within 5–10 business days upon submission of audited financial statements and tax payment certificates.

Strategic Considerations for 2026

Foreign investors evaluating a semiconductor WFOE in China in 2026 should weigh four strategic factors:

1. Escalating U.S.–China Technology Competition: The U.S. Chips Act (2022) and subsequent BIS export controls (October 2022, October 2023, March 2025) have created a bifurcated supply chain. A WFOE in China manufacturing advanced equipment or EDA tools may encounter restrictions on transferring technology from U.S.-origin parent companies. A careful technical-assistance and deemed-export compliance review is essential.
2. China’s Self-Sufficiency Drive: The Chinese government prioritizes domestic production of semiconductor equipment, materials, and EDA tools. Foreign WFOEs in these subsectors may face market-access advantages (via local content requirements in SOE procurement) as well as competitive pressure from well-funded domestic rivals supported by the Big Fund.
3. Negative List Trends: The Negative List has contracted steadily from 190 measures in 2013 to 29 in 2024. The semiconductor industry has not been a target of new restrictions in the 2021 or 2024 editions, suggesting sustained openness for permitted subsectors. However, the security review mechanism has become more active, and investors should anticipate deeper scrutiny of technology transfer arrangements.
4. Regional Competition Among Chinese Provinces: Shanghai, Beijing, Shenzhen, Wuxi, Hefei, and Chengdu each offer distinct incentive packages for semiconductor WFOEs. WFOEs in IC design may prefer Shanghai (Zhangjiang) for its mature talent pool and EDA ecosystem. Equipment manufacturers may prefer Beijing’s Yizhuang area for proximity to SMIC and Beijing’s manufacturing cluster. Materials producers often choose coastal chemistry zones in Zhejiang or Jiangsu for feedstock logistics.

Where to Go From Here

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