Semiconductor Update: Foreign Investment Rule Revision — Key Takeaways
China’s latest 2024 revision of the 外商投资准入负面清单 (Negative List for Foreign Investment Access, wàishāng tóuzī zhǔnrù fùmiàn qīngdān) has reduced restricted items to 29, a net reduction of 2 items from the 2021 edition, and directly removes barriers in two semiconductor sub-sectors. This policy change, effective November 1, 2024, permits 100% foreign ownership in integrated circuit design and printed circuit board manufacturing for the first time, reversing a 5-year restriction period that began in 2019. For foreign semiconductor executives, this is the most significant deregulation since the 2018 Negative List edition.
The revision specifically removes “integrated circuit design” and “printed circuit board (PCB) manufacturing” from the restricted category under the 外商投资产业指导目录 (Foreign Investment Industry Guidance Catalogue, wàishāng tóuzī chǎnyè zhǐdǎo mùlù). This means that foreign companies can now establish wholly-owned subsidiaries — known as 外商独资企业 (Wholly Foreign-Owned Enterprise, WFOE, wàishāng dúzī qǐyè) — in these segments without requiring a Chinese joint venture partner. The change signals Beijing’s intent to attract advanced semiconductor R&D and manufacturing capacity amid global supply chain realignment.
Overview of the 2024 Negative List Revision
The 2024 National Negative List, officially titled 《外商投资准入特别管理措施(负面清单)(2024年版)》 (Special Administrative Measures for Foreign Investment Access (Negative List) 2024 Edition), contains 29 restricted items across all industries. This is down from 31 in 2021 and 33 in 2019. For the semiconductor sector specifically, 12 out of 14 major sub-sectors are now fully open to foreign investment, covering 86% of the value chain from design to packaging and testing.
The two sub-sectors that remain restricted are “large-scale integrated circuit manufacturing with linewidth below 28 nanometers” and “advanced compound semiconductor substrate production.” These still require a Chinese-controlled joint venture structure. However, the relaxation in design and PCB manufacturing covers the majority of foreign investment applications seen in recent years. According to China’s Ministry of Commerce, 73% of foreign semiconductor project applications in 2022-2023 were for design or PCB-related ventures.
The timing of this revision is strategic. China’s semiconductor market reached RMB 1.42 trillion in 2023, representing 35% of global semiconductor demand. Yet domestic production meets only 23% of that demand, leaving an import gap of RMB 1.09 trillion. The policy change aims to close that gap by encouraging foreign technology transfer and local R&D investment.
Key Changes Affecting Semiconductor Foreign Investment
Three structural changes in the 2024 revision directly impact foreign semiconductor companies planning China entry:
1. Removal of “Integrated Circuit Design” from Restricted Category
Effective November 1, 2024, foreign companies can establish 100% owned subsidiaries for IC design without a Chinese partner. Previously, all IC design ventures required a Chinese-controlled joint venture with foreign ownership capped at 50%. This change opens the door for companies like Qualcomm, MediaTek, and AMD to expand their China-based design teams without equity dilution.
2. Removal of “Printed Circuit Board Manufacturing” from Restricted Category
PCB manufacturing, previously restricted to joint ventures, is now fully open to WFOE structures. This affects both rigid and flexible PCB production. Global players such as Unimicron, Ibiden, and AT&S can now consider wholly-owned factories in China, bypassing the need for local partners who often control technology access.
3. No Change for Advanced Manufacturing Nodes
Sub-28nm IC manufacturing and advanced compound semiconductor (GaN, SiC) substrate production remain restricted, requiring Chinese-controlled joint ventures. Foreign ownership in these sub-sectors is capped at 49% if the project exceeds certain scale thresholds. This preserves China’s domestic control over cutting-edge fabrication while opening the design and intermediate manufacturing tiers.
These changes align with China’s 半导体产业政策 (Semiconductor Industry Policy, bàndǎotǐ chǎnyè zhèngcè) outlined in the “Made in China 2025” initiative. The government is prioritizing design capability and intermediate manufacturing capacity, where foreign expertise can accelerate domestic ecosystem growth without exposing national security-sensitive fabrication technology.
Comparative Analysis: Before and After the Revision
| Semiconductor Sub-Sector | Pre-2024 Rule | Post-2024 Rule | Effective Date | Foreign Ownership Cap (Post) |
|---|---|---|---|---|
| Integrated Circuit Design | Chinese-controlled JV required; foreign cap ≤50% | Fully open; WFOE permitted | Nov 1, 2024 | 100% |
| Printed Circuit Board Manufacturing | Chinese-controlled JV required; foreign cap ≤50% | Fully open; WFOE permitted | Nov 1, 2024 | 100% |
| IC Manufacturing (≥28nm) | Open; no restriction since 2018 | No change; remains open | Already in effect | 100% |
| IC Manufacturing (<28nm) | Chinese-controlled JV required; foreign cap ≤49% | No change; remains restricted | Continued restriction | ≤49% |
| Advanced Compound Substrate (GaN/SiC) | Chinese-controlled JV required; foreign cap ≤49% | No change; remains restricted | Continued restriction | ≤49% |
| Packaging & Testing | Open; no restriction since 2018 | No change; remains open | Already in effect | 100% |
| Semiconductor Equipment Manufacturing | Open; no restriction | No change; remains open | Already in effect | 100% |
| EDA Software Development | Open; no restriction | No change; remains open | Already in effect | 100% |
The table illustrates that the 2024 revision primarily relaxes design and PCB manufacturing — two sub-sectors that accounted for 34% of all foreign semiconductor investment projects in China between 2019 and 2023, per data from the China Semiconductor Industry Association (CSIA). The remaining restrictions focus on advanced fabrication nodes, reflecting Beijing’s cautious approach to preserving domestic control over strategic technology.
What This Means for Foreign Investors in Practice
For foreign firms now evaluating China entry under the relaxed rules, the practical implications are significant. A foreign IC design company can establish a WFOE in Shanghai’s Zhangjiang Hi-Tech Park or Beijing’s Zhongguancun without a Chinese partner, retaining full IP ownership, operational control, and profit repatriation rights. This eliminates the most common friction point in joint ventures: technology leakage risk and governance disputes.
However, the revision does not remove other regulatory requirements. All foreign-invested semiconductor companies must still register under the 外商投资法 (Foreign Investment Law, wàishāng tóuzī fǎ), complete a national security review if the project touches restricted technologies, and comply with export control rules for dual-use items. For design companies, the revised 《集成电路产业政策》 (Integrated Circuit Industry Policy, jíchéng diànlù chǎnyè zhèngcè) offers tax incentives — including a 10% corporate income tax rate for qualifying design firms — but these incentives require Ministry of Industry and Information Technology (MIIT) certification.
Foreign PCB manufacturers also benefit from the WFOE structure. A Japanese or Taiwanese PCB maker can now build a wholly-owned factory in Kunshan or Shenzhen, sourcing local raw materials and serving downstream electronics assemblers without a Chinese partner’s equity stake. This reduces setup time by an estimated 4-6 months, as joint venture negotiations are entirely eliminated. With China’s PCB market valued at RMB 387 billion in 2023, and growing at 6.2% annually, the opportunity is substantial.
For companies considering the still-restricted sub-28nm fabrication segment, the joint venture route remains the only option. Foreign investors should expect the Chinese partner to hold majority control (at least 51%) and retain final say on technology licensing. Joint ventures in this space typically require approval from the National Development and Reform Commission (NDRC) and the Ministry of Commerce (MOFCOM), adding 8-12 months to the setup timeline.
Strategic Implications and Timeline for Action
The 2024 revision is not an isolated move. It follows a broader pattern of selective liberalization in China’s technology sectors since 2022, where the government opens mature or intermediate technology tiers while keeping cutting-edge segments under domestic control. For semiconductors, this means design and PCB manufacturing are now “open for business” via WFOE structure, while advanced fabrication remains restricted.
Foreign executives should note three strategic timing factors. First, the revision took effect on November 1, 2024, meaning companies can submit WFOE applications immediately under the new rules. Second, China’s “14th Five-Year Plan” for the semiconductor industry, released in 2023, targets 70% domestic self-sufficiency in IC design by 2027 — up from 48% in 2023. Foreign design firms that establish local teams now can capture incentive subsidies before the market tightens. Third, the 2025 version of the Negative List is already under consultation, with industry analysts expecting further relaxation in memory chip manufacturing and sensor design sub-sectors by 2026.
The practical window for first-mover advantage is approximately 18-24 months. Early adopters can secure prime office and lab space in designated semiconductor parks, negotiate land-use rights with local governments, and apply for MIIT certification before competition intensifies. Late movers risk facing quota limits on tax incentive programs and longer approval timelines as regulatory capacity becomes saturated.
Companies that remain solely focused on sub-28nm fabrication should maintain joint venture strategies but begin planning for a potential 2026 relaxation. The Chinese government has publicly stated that “mature node” (≥28nm) manufacturing will be fully opened by 2027, and the current restriction on sub-28nm may ease for advanced packaging integration technologies sooner than expected.
NEXT STEPS
- Assess your sub-sector eligibility — Review your semiconductor product line against the revised negative list. If your activity falls under IC design or PCB manufacturing, proceed with WFOE setup planning. Read our full guide: Semiconductor WFOE Setup Guide 2025
- Evaluate national security review risk — Even in open sub-sectors, projects touching IoT, AI, or defense applications may trigger security review. Use our checklist: China National Security Review Checklist for Foreign Investors
- Begin location scouting for semiconductor parks — Shanghai, Beijing, Shenzhen, and Wuxi offer differentiated incentive packages for IC design WFOEs. Compare options: China Semiconductor Park Comparison: Incentives, Infrastructure, and Talent Pools
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