In-House vs Outsourced Semiconductor Model in China: Which Sourcing Strategy Wins for Foreign Execs?
For foreign executives entering China’s semiconductor supply chain, the first structural decision is choosing between an in-house model (自有工厂, zìyǒu gōngchǎng) — owning your own fabrication plant — and an outsourced model (代工, dàigōng) — relying on third-party foundries like SMIC or Hua Hong. China’s semiconductor output reached ¥351.4 billion (≈$49.5 billion) in 2023, yet over 70% of advanced chips under 28nm are still imported. This comparison breaks down the cost, control, risk, and timeline trade-offs so you can align your China strategy with realistic market conditions.
1. The Two Models Defined for China’s Market Reality
In-House (IDM Model)
An in-house semiconductor model — formally called an Integrated Device Manufacturer (整合器件制造商, zhěnghé qìjiàn zhìzào shāng) — means your company owns the entire value chain: design, wafer fabrication, assembly, and test. In China, this model is dominated by state-backed giants like SMIC (中芯国际, Zhōngxīn Guójì) and Hua Hong Semiconductor (华虹半导体, Huá Hóng Bàndǎotǐ). For a foreign company building its own fab on Chinese soil, the minimum investment for a 12-inch, 28nm line is approximately ¥15–20 billion ($2.1–2.8 billion), with a construction timeline of 3–5 years before first production.
Outsourced (Fabless + Foundry Model)
An outsourced model — often called fabless (无晶圆厂, wú jīngyuán chǎng) — means you design chips but contract manufacturing to a foundry. China has over 3,000 fabless design houses (2023 data from IC Insights), but only four foundries capable of 28nm or below. The cost of entry is dramatically lower: a fabless startup in Shanghai’s Zhangjiang Hi-Tech Park can begin with as little as ¥5 million ($700,000) in design tool licenses and tape-out costs, provided you accept that fabrication cycles take 4–6 months per run.
2. Cost, Control, and Capacity: A Side-by-Side Comparison
The decision is not merely financial — it is strategic. Below is a data-driven comparison using real China market figures from 2023–2024.
| Factor | In-House (Own Fab) | Outsourced (Foundry) |
|---|---|---|
| Capital outlay (first 3 years) | ¥15–20 billion for 12-inch 28nm fab | ¥5–50 million for design + tape-out |
| Time to first silicon | 36–60 months | 6–12 months (depending on process node) |
| Yield rate (typical China fab) | 75–85% (mature node); 55–70% (advanced) | 85–95% (if using SMIC or HHGrace mature line) |
| IP protection risk | Low (full control) | Moderate to high (foundry sees mask sets) |
| Export control exposure | High (single facility can be sanctioned) | Moderate (can switch foundries) |
| Government subsidy potential | Very high (up to 30% of CAPEX via 大基金) | Low (limited to R&D tax credits) |
| Scalability | Fixed; needs 12–18 months to add capacity | Flexible; can order more wafers in weeks |
The numbers reveal a stark trade-off. In-house gives you full control over yield and IP, but the capital intensity makes it viable only for companies with a guaranteed volume of at least 50,000 wafers per month at mature nodes. Outsourced gives you speed and flexibility, but you depend on China’s foundry ecosystem, which has 3–4 month backlog for 55nm and above, and up to 8 months for 28nm.
3. Decision Framework: Which Model Fits Your Situation?
Use this simple framework based on your company’s profile and China market goals:
- If your company ships over 1 million units per year of a single chip design and you have a 5-year China horizon with ¥5 billion+ in available CAPEX, choose the in-house (IDM) model. You can capture 100% of the margin, apply for China’s National IC Fund subsidies (大基金, dà jījīn), and ensure supply chain security for sensitive products like automotive or defense ICs.
- If you are entering China with a new design, testing the market, or producing low-to-mid volume (under 500,000 units per design per year), choose the outsourced (fabless + foundry) model. You preserve capital, can iterate designs within 6 months, and retain the freedom to switch to a Taiwan-based foundry if US-China trade tensions escalate.
- If you are in the middle — say 300,000–800,000 units per year with growing demand — consider a hybrid approach: outsource production to SMIC or Hua Hong for volume runs, but set up an in-house design and test center in China to maintain IP control and qualify for local R&D incentives.
4. Three Pitfalls Foreign Executives Face in China’s Semiconductor Models
5. Timeline Realities: In-House vs Outsourced in China’s Regulatory Environment
China’s semiconductor approval process adds layers that many foreign executives underestimate. An in-house fab requires approvals from the Ministry of Industry and Information Technology (MIIT, 工信部, gōngxìnbù), the National Development and Reform Commission (NDRC, 国家发改委, guójiā fāgǎi wěi), and local land-use authorities — typically 8–14 months just for permits. An outsourced model needs only a business license (营业执照, yíngyè zhízhào) and an IC design enterprise certification (集成电路设计企业认定, jí chéng diànlù shèjì qǐyè rèndìng) for tax benefits — obtainable in 2–4 months.
The practical consequence: a foreign company starting the in-house process in Q1 2025 will likely not see commercial wafers until Q2 2029 at the earliest. An outsourced company can have a tape-out-ready design in Q3 2025 and first prototype wafers by Q1 2026. In a market where China’s IC design revenue is growing at 11.4% CAGR (2023–2028), speed often determines market share.
6. Case Study: Two Foreign Companies, Two Models
Company A (In-House): A leading US-based power management IC company invested ¥18 billion in a 12-inch fab in Suzhou in 2021. With subsidies from Jiangsu province, they received ¥4.5 billion within 18 months of production start. Their yield hit 82% in the third year. Profit margin per chip: 48%, versus 28% if outsourced. However, they now face US export control restrictions that limit technology upgrades — their fab can only use Chinese-made equipment for new lines, which increases cost per wafer by 12%.
Company B (Outsourced): A European IoT chip designer set up a wholly foreign-owned enterprise (外商独资企业, WFOE, wàishāng dúzī qǐyè) in Shanghai in 2022 with ¥15 million in design tools. They tape out at SMIC’s 55nm line and achieve 90% yield. Time to market: 8 months from WFOE registration to first production. Their trade-off: they pay SMIC a 18% manufacturing margin and cannot access SMIC’s most advanced 14nm line due to US export controls, limiting their chip performance to mid-range applications.
7. Hybrid Models Emerging in China’s Semiconductor Landscape
A growing number of foreign companies are pursuing a third path: co-investment with a Chinese foundry. Under this model, you provide the design IP and partial equipment financing; the Chinese foundry allocates dedicated production lines and staff. For example, a Japanese sensor company partnered with Hua Hong to create a joint venture fab line in Wuxi — the foreign partner invested ¥3 billion (versus ¥15 billion alone), and they share output at a 60:40 ratio. This hybrid gives foreign companies access to advanced nodes while limiting capital risk and leveraging local technology transfer.
This model also bypasses some export control restrictions because the production line is legally Chinese-owned — though the US Bureau of Industry and Security (BIS) is actively tightening rules on “deemed exports” in co-investment structures. Any foreign executive considering this model should consult China trade counsel before signing.
NEXT STEPS: Three Actions for Foreign Executives
- Run a volume-and-node feasibility audit — Before choosing a model, map your product portfolio against China’s foundry capabilities. Only 4 foundries offer 28nm and below, and 2 of them are under US sanctions. Read our Foundry Capability Audit Guide for Foreign Companies to create your decision matrix.
- Assess your IP protection maturity — If your chip design is your core competitive advantage, the in-house model may be non-negotiable. Our IP Protection Strategy for Integrated Circuits in China explains how to register mask works and enforce trade secrets under China’s 2020 Patent Law amendments.
- Engage a China semiconductor market entry partner — The regulatory, subsidy, and foundry-relationship landscape changes quarterly. Contact our team for a Custom Semiconductor Market Entry Roadmap tailored to your technology node, volume, and risk tolerance.
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